Tektronix BSX320 Test Equipment

specifications
Pattern Generation and Error Analysis up to 32 Gb/s
Optional built-in 4-tap Tx equalization with support for interactive link training
Protocol-oriented and bit-oriented multi-chain pattern sequencing with enhanced pattern/sequence editor
User-defined detector pattern matching with stimulus-response feedback
Patented Error Location Analysis™ goes beyond BER measurement to provide insight into the sources of errors through analysis of correlations and deterministic error patterns
Optional Forward Error Correction analysis provides for simulation of post-FEC error rate based upon measured error location patterns